http://www.eetimes.com/news/semi/showAr ... =202805354
Looks like AMD is trying to sell their fab(s?) to TSMC (again?!).
I guess this puts a new spin on the discussion here
AMD going fabless?
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quantus
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Intel CEO: Let's cooperate on 450-mm
Depending on how this works out, AMD and many smaller manufacturers may get pushed out sheerly because they can't afford to push on to 450mm wafers. They're just not ahead on the cost curve like the larger players such as Intel and Samsung are. Intel's pushing hard on this because it's the big gate which will likely drive the next big shakeout assuming people get through the looming litho issues. Hell, litho for a 450mm wafer is the reason that equipment manufacturers feel that it's just not worth it to scale to larger wafers anymore. There was another EE Times article about how there's no appreciable throughput increase by going to the larger size. The main reason for scaling is to get more use from the tool per time since it'll take the same time to do implants or bakes whether the wafer is 50mm (~2 inches) or 450mm (~18 inches).
Depending on how this works out, AMD and many smaller manufacturers may get pushed out sheerly because they can't afford to push on to 450mm wafers. They're just not ahead on the cost curve like the larger players such as Intel and Samsung are. Intel's pushing hard on this because it's the big gate which will likely drive the next big shakeout assuming people get through the looming litho issues. Hell, litho for a 450mm wafer is the reason that equipment manufacturers feel that it's just not worth it to scale to larger wafers anymore. There was another EE Times article about how there's no appreciable throughput increase by going to the larger size. The main reason for scaling is to get more use from the tool per time since it'll take the same time to do implants or bakes whether the wafer is 50mm (~2 inches) or 450mm (~18 inches).
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Jonathan
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Er, if there were no appreciable increase in throughput, wouldn't the folks at smaller wafer sizes be ok, then?quantus wrote:Depending on how this works out, AMD and many smaller manufacturers may get pushed out sheerly because they can't afford to push on to 450mm wafers.
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There was another EE Times article about how there's no appreciable throughput increase by going to the larger size.
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quantus
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Yes, theoretically, but if Intel gets people spending on 450mm, then AMD will wind up spending too whether they like it or not. The vendors are gonna have to increase prices to pay for the R&D and that affects everyone.
Anyway, the industry as a whole thinks that 300mm tools could be optimized further. The explanation why 450mm won't work as advertised goes something like this:
For smaller wafer sizes, wafer level operations like loading and focusing were done in series with the actual shooting of die. And there were fewer die to step over, so that part of the equation wasn't completely dominating. Also, tools were cheap enough that buying another was an option. Now, the loading has been parallelized with exposure by using dual stages so that one is doing wafer setup while the other is being exposed and exposure is now the one and only limiting factor for tool throughput. It's also gotten slow enough that litho is one of the slower steps in the process. Now, the only trick left is to replicate, but at $40 million a pop for a immersion tool, that's gonna dent even Intel's pocket a bit to buy more than one or two for a fab. If we move to having double exposure for critical layers like poly, then that'll put even more load on the litho tool!
Anyway, the industry as a whole thinks that 300mm tools could be optimized further. The explanation why 450mm won't work as advertised goes something like this:
For smaller wafer sizes, wafer level operations like loading and focusing were done in series with the actual shooting of die. And there were fewer die to step over, so that part of the equation wasn't completely dominating. Also, tools were cheap enough that buying another was an option. Now, the loading has been parallelized with exposure by using dual stages so that one is doing wafer setup while the other is being exposed and exposure is now the one and only limiting factor for tool throughput. It's also gotten slow enough that litho is one of the slower steps in the process. Now, the only trick left is to replicate, but at $40 million a pop for a immersion tool, that's gonna dent even Intel's pocket a bit to buy more than one or two for a fab. If we move to having double exposure for critical layers like poly, then that'll put even more load on the litho tool!
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Jonathan
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That doesn't make sense. Fixed costs just grow; they might as well make that part of Moore's Law. N*$40M is not big for a $4B fab. Churn out a billion die or get the hell out.
Disclaimer: The postings on this site are my own and don't necessarily represent Intel's positions, strategies, or opinions.
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quantus
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Heh, precisely, assuming you can sell them all. AMD isn't as big, can't get the cash to grow faster than Intel and likely never will now unless Intel makes another mistake like hyper-pipelining. This is why AMD will have to go fabless.Dwindlehop wrote:Churn out a billion die or get the hell out.
Btw, when 1 tool shows up as 1% of your total cost a piece, that's significant. If even a couple of other tools did that, you'd likely not be churning out a billion chips because your ROI would suck assuming you could get a return.