Flash Access Times?

[VLSmooth]

Sadly, I've been out-of-touch with the details of solid state electronics.

Is this a true flash statement?

every single area of every single chip is just as quick and easy to access as the next

I was under the impression flash access times where akin to RAM, using row and column address strobes. Hence accessing data on the same row should be much faster than across rows.

On the other hand, I haven't seen the standard four-digit latency numbers used by RAM applied to flash ( wiki:sdram_latency ). Since flash is usually compared to hard drives, perhaps most publishers consider row/column latencies to be insignificant?

The prerequisite links:

• Slashdot : Sony's Solid State 2.4 Pound Laptop Reviewed
• TrustedReviews : Sony VAIO VGN-TZ12VN : Linked from Slashdot
• SSD Myths and Legends - "write endurance" : Interesting article that assumes round-robin writes. However, I'm not convinced that's a safe assumption.

[Jonathan]

Modern static devices are managed, not used dumbly, so they distribute writes all over the chip to prevent one part from wearing out before the rest.

The deal with dynamic devices is that you have to allow enough time for the charge pump to work. This is a real amount of latency, hence the timing info. Moreover, once you charge a certain part of it, electrical characteristics and thermal limits prevent you from charging a different part of it within a certain amount of time. With a static device, you can just send those strobes down on in there whenever you feel like it. Pretty sure that's how it is; there is no such thing as a "page hit" on NOR or NAND.

[Jonathan]

I'll double check when I get to work.