http://www.embedded.com/showArticle.jht ... =188702384
It’s clear that hardware guys have it good relative to multicore software designers, something that may not have been apparent 20 years ago. With the advent of multicore, if hardware designers are tasked with doubling the raw performance of a processor, there is a very real chance that they will take existing IP, tweak it, replicate it and provide some interconnect logic and call it a day. If they need to make it four times as fast, they do the above three times.
Not meaning to trivialize hardware design...
Heh, if life were only that easy we wouldn't need so many damn verification engineers.
One manufacturer presenting at the expo has successfully deployed their 300+ core processor to the embedded market. A software developer that wants to use this core has the option of using the core manufacturer’s compiler and debugger, or none at all if they want to use that core.
I vote for using no debugger!
How many cores can an engineer observe at one time and still understand what’s going on in each?
Good question. I'm gonna take the gullydwarf approach and say, "Two. No more than two."